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<div class="header">
  <div class="headertitle"><div class="title">RCC_PLL2InitTypeDef Struct Reference<div class="ingroups"><a class="el" href="group___s_t_m32_h7xx___h_a_l___driver.html">STM32H7xx_HAL_Driver</a> &raquo; <a class="el" href="group___r_c_c_ex.html">RCCEx</a> &raquo; <a class="el" href="group___r_c_c_ex___exported___types.html">RCCEx Exported Types</a></div></div></div>
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<p>PLL2 Clock structure definition.  
 <a href="#details">More...</a></p>

<p><code>#include &lt;<a class="el" href="stm32h7xx__hal__rcc__ex_8h_source.html">stm32h7xx_hal_rcc_ex.h</a>&gt;</code></p>
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<tr class="heading"><td colspan="2"><h2 id="header-pub-attribs" class="groupheader"><a id="pub-attribs" name="pub-attribs"></a>
Public Attributes</h2></td></tr>
<tr class="memitem:a3ad5fd858d8ed0ac9f755f7c695ffb31" id="r_a3ad5fd858d8ed0ac9f755f7c695ffb31"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a3ad5fd858d8ed0ac9f755f7c695ffb31">PLL2M</a></td></tr>
<tr class="memitem:a671c143593021bcbee5b2817e67bc297" id="r_a671c143593021bcbee5b2817e67bc297"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a671c143593021bcbee5b2817e67bc297">PLL2N</a></td></tr>
<tr class="memitem:ad008f3ff2c131bbe35eae73a3942aa16" id="r_ad008f3ff2c131bbe35eae73a3942aa16"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ad008f3ff2c131bbe35eae73a3942aa16">PLL2P</a></td></tr>
<tr class="memitem:ad94606003e7cf43fcc864776ee61341d" id="r_ad94606003e7cf43fcc864776ee61341d"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ad94606003e7cf43fcc864776ee61341d">PLL2Q</a></td></tr>
<tr class="memitem:a3871c154ba3986c590adeca367edd766" id="r_a3871c154ba3986c590adeca367edd766"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a3871c154ba3986c590adeca367edd766">PLL2R</a></td></tr>
<tr class="memitem:a64be6eb14e50c40fa0e8133de46d1972" id="r_a64be6eb14e50c40fa0e8133de46d1972"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a64be6eb14e50c40fa0e8133de46d1972">PLL2RGE</a></td></tr>
<tr class="memitem:ac30edcebfff52e53c3619688c5a0680d" id="r_ac30edcebfff52e53c3619688c5a0680d"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ac30edcebfff52e53c3619688c5a0680d">PLL2VCOSEL</a></td></tr>
<tr class="memitem:a7e47d1e68b48413a84a0991ed684b5cd" id="r_a7e47d1e68b48413a84a0991ed684b5cd"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a7e47d1e68b48413a84a0991ed684b5cd">PLL2FRACN</a></td></tr>
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<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
<div class="textblock"><p>PLL2 Clock structure definition. </p>
</div><a name="doc-variable-members" id="doc-variable-members"></a><h2 id="header-doc-variable-members" class="groupheader">Member Data Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a7e47d1e68b48413a84a0991ed684b5cd">&#9670;&#160;</a></span>PLL2FRACN</h2>

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          <td class="memname">uint32_t RCC_PLL2InitTypeDef::PLL2FRACN</td>
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<p>PLL2FRACN: Specifies Fractional Part Of The Multiplication Factor for PLL2 VCO It should be a value between 0 and 8191 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a3ad5fd858d8ed0ac9f755f7c695ffb31">&#9670;&#160;</a></span>PLL2M</h2>

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<p>PLL2M: Division factor for PLL2 VCO input clock. This parameter must be a number between Min_Data = 1 and Max_Data = 63 </p>

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<a id="a671c143593021bcbee5b2817e67bc297" name="a671c143593021bcbee5b2817e67bc297"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a671c143593021bcbee5b2817e67bc297">&#9670;&#160;</a></span>PLL2N</h2>

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<p>PLL2N: Multiplication factor for PLL2 VCO output clock. This parameter must be a number between Min_Data = 4 and Max_Data = 512 or between Min_Data = 8 and Max_Data = 420(*) (*) : For stm32h7a3xx and stm32h7b3xx family lines. </p>

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<a id="ad008f3ff2c131bbe35eae73a3942aa16" name="ad008f3ff2c131bbe35eae73a3942aa16"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ad008f3ff2c131bbe35eae73a3942aa16">&#9670;&#160;</a></span>PLL2P</h2>

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<p>PLL2P: Division factor for system clock. This parameter must be a number between Min_Data = 2 and Max_Data = 128 odd division factors are not allowed </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ad94606003e7cf43fcc864776ee61341d">&#9670;&#160;</a></span>PLL2Q</h2>

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<p>PLL2Q: Division factor for peripheral clocks. This parameter must be a number between Min_Data = 1 and Max_Data = 128 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a3871c154ba3986c590adeca367edd766">&#9670;&#160;</a></span>PLL2R</h2>

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<p>PLL2R: Division factor for peripheral clocks. This parameter must be a number between Min_Data = 1 and Max_Data = 128 </p>

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<a id="a64be6eb14e50c40fa0e8133de46d1972" name="a64be6eb14e50c40fa0e8133de46d1972"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a64be6eb14e50c40fa0e8133de46d1972">&#9670;&#160;</a></span>PLL2RGE</h2>

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<p>PLL2RGE: PLL2 clock Input range This parameter must be a value of <a class="el" href="group___r_c_c___p_l_l2___v_c_i___range.html">RCC PLL2 VCI Range</a> </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ac30edcebfff52e53c3619688c5a0680d">&#9670;&#160;</a></span>PLL2VCOSEL</h2>

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<p>PLL2VCOSEL: PLL2 clock Output range This parameter must be a value of <a class="el" href="group___r_c_c___p_l_l2___v_c_o___range.html">RCC PLL2 VCO Range</a> </p>

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<hr/>The documentation for this struct was generated from the following file:<ul>
<li>C:/Users/ASUS/Desktop/dm-ctrlH7-balance-9025test/Drivers/STM32H7xx_HAL_Driver/Inc/<a class="el" href="stm32h7xx__hal__rcc__ex_8h_source.html">stm32h7xx_hal_rcc_ex.h</a></li>
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